PURPOSE: To cause a fault automatically at optional timing, by providing an automatic artifical fault generating function capable of varying the time from the execution of a fault generation instruction to the occurrence of an actual fault optionally.
CONSTITUTION: A main storage device 10, CPU13, and input/output controller 14 are equipped with interface parts 21, 23 and 25 for a diagnosis control part 12 respectively, and registers 20, 22 and 24 for controlling artifical fault generation are provided thereto respectively. For example, when the artifical fault is caused in the CPU13 by software instructions, the CPU13 decodes the artifical fault generating instruction to indicate the fault occurrence to a control part 12 through a controller 11. The control part 12 sets a timer value in a timer 28 by random pattern generation. Then, data is set in a register 22 in the CPU13 through a bus 111 in a time-out state. Consequently, the artificial fault occurs and is reported to the control part 12, thereby activating a fault processing procedure.
JPS49123747A | 1974-11-27 | |||
JPS50100942A | 1975-08-11 | |||
JPS5580158A | 1980-06-17 |