Title:
MANUFACTURE OF SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS60105255
Kind Code:
A
Abstract:
PURPOSE:To simplify the process and to prevent interruption of connection due to level differences, by providing a process for projecting a specified region in a lower distribution layer such that projected region is connected with a upper distribution layer. CONSTITUTION:An insulation layer 11 is formed on the surface of a semiconductor substrate 10 and is provided with a projection 12 by selectively etching predetermined regions by RIE. A lower distribution layer 13 and then an interfacial insulation layer are formed on the whole surface. After that, the layers are etched until the projected region 15 of the lower distribution layer 13 is exposed. An upper distribution layer 16 is formed on the interfacial insulation layer 14 so as to be connected with the projected region 15 and is provided with a predetermined pattern. Thus a semiconductor device 17 is obtained. In such a manner, the upper and lower distribution layers 16 and 13 can be connected without formation of any contact holes. Further, since the lower distribution layer 13 is provided with the projected region 15 just over the projection 12, the upper and lower distribution layers 16 and 13 can be connected without interruption of the connection due to the level differences.
Inventors:
TAKAMATSU YUKI
Application Number:
JP21352483A
Publication Date:
June 10, 1985
Filing Date:
November 14, 1983
Export Citation:
Assignee:
TOSHIBA KK
International Classes:
H01L21/3205; H01L21/302; H01L21/3065; (IPC1-7): H01L21/302
Attorney, Agent or Firm:
Takehiko Suzue