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Title:
AUTOMATIC LEVEL CONTROL CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPS60153614
Kind Code:
A
Abstract:

PURPOSE: To set freely the attack time without changing recovery time by providing a switching element charging rapidly an externally mounted capacitor.

CONSTITUTION: A signal applied to an input terminal is amplified by preamplifiers PA1-L, PA1-R and PA2-L, PA2-R in an integrated circuit IC and outputted from output terminals T4, T5, and when its output level reaches a certain level or over, transistors (TRs) Q1, Q2 of an attack time control circuit 23 are turned on via coupling circuits 21, 22, and a capacitor C1 is charged rapidly. The attack time of the automatic level control circuit is set freely from an external circuit as fast as possible independently of a detecting circuit built in the circuit IC in this way and the recovery time is set freely by selecting properly the constant of a resistor R1 and a capacitor C1 mounted externally. Then the attack time and the recovery time are set to a desired value at the same time.


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Inventors:
KOMORI YUUJI
OOHASHI AKIHIRO
Application Number:
JP1063784A
Publication Date:
August 13, 1985
Filing Date:
January 24, 1984
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
G11B20/04; H03G3/20; (IPC1-7): G11B20/04
Domestic Patent References:
JPS58111512A1983-07-02
JPS5779722A1982-05-19
Attorney, Agent or Firm:
Takehiko Suzue



 
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