Title:
【考案の名称】シリアルデ-タ入力-パラレルデ-タ出力回路
Document Type and Number:
Japanese Patent JPS60144332
Kind Code:
U
Inventors:
Osamu Inoue
Application Number:
JP3158884U
Publication Date:
September 25, 1985
Filing Date:
March 07, 1984
Export Citation:
International Classes:
H03M9/00; (IPC1-7): H03M9/00