PURPOSE: To change the next address to be executed with a signal bed from an external circuit, by using an adder circuit which gives an input to an address terminal of an ROM and a selecting circuit which selects the 2nd input or the carry input of the adder circuit with an external input signal.
CONSTITUTION: The signals supplied to ekip terminals SKT2 and SKT3 are fed to an AND22 and AND23 respectively. In this case, however, the address value of a half adder HA1 which is previously supplied from an ROM through the latch circuit group varies since a skip control signal S1is fed to AND22 and 23 respectively from a control signal generating part CONT. At the same time, skip terminals SKT1WSKT3 deliver the input to AND19WAND21, and skip control signals S2WS4 are fed to the 2nd input and controlled through an OR2 so as to give +1 to the address to be executed next. In such a way, a program memory is saved and at the same time the using efficiency is improved for a register.
JPS55121561 | INFORMATION PROCESSING SYSTEM |
JPS62501940 | [Title of the Invention] Improvement of a micro program controller |
JPH01211031 | MICROPROGRAM CONTROLLER |