Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
NOISE ELIMINATING CIRCUIT
Document Type and Number:
Japanese Patent JPS6113783
Kind Code:
A
Abstract:

PURPOSE: To attain the effective elimination of noises by switching a changeover switch toward a latch circuit when the signal level of sequence zero is higher than the reference level and switching signals excepting those having low S/N toward the latch circuit when said signal level is less than the reference level.

CONSTITUTION: The digital video signals supplied from an input terminal 1 undergoes the m-order Hadamard conversion 2 and are divided into signals of sequences 0∼(m-1) by a multiplexer 3 to be latched by latch circuits 4 (40∼4m-1). This latch output is supplied to a band compressor 9 via a level control circuit 7 and applied to a rotary magnetic head after band compression and amplification. In this case, the circuit 7 controls the levels of signals Sk, Sl... of prescribed sequences (k), (l)... among signals of sequences 0∼(m-1). When the level of the signal S0 of sequence zero is higher than a reference level, the changeover switches SW0∼SWm-1 are switched toward the circuit 4. While signals SWk, SWl... are switched toward a digital level generator 8 with other switches switched toward circuits 40∼4m-1 when the level of the signal S0 is less than the reference level respectively.


Inventors:
ISHIDA KAZUO
Application Number:
JP13366084A
Publication Date:
January 22, 1986
Filing Date:
June 28, 1984
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SONY CORP
International Classes:
G11B20/24; H04N5/91; H04N5/92; (IPC1-7): G11B20/24; H04N5/91
Attorney, Agent or Firm:
Sada Ito