PURPOSE: To reduce the quantity of hardware and to improve the efficiency of a fault diagnosis, by stopping a clock signal on falt occurrence and holding the significant state value of a control signal for a predetermined period.

CONSTITUTION: Data from a register 223 is set in registers 222 and 224 of a central processing part 100' synchronously with a clock signal 80 by indications of control signals 22W24 from a control circuit 110. A control signal 21 and signals 22 and 23 in the circuit 110 have important meanings to a diagnosis and an analysis of fault processing and are generated successively to hold significant state values in holding circuits 121W123 for the predetermined time. If a fault occurs to the processing part 100', a diagnostic processing part 300 senses the fault by a falut report signal 95 and stops the signal 90 by a clock stop indication signal 90, and a selecting circuit 130 reads a significant signal from circuits 121W123 selectively. The states of the control signals in a short period before and after the generation of factors of the diagonosis and analysis such as a clock stop, etc. are held and read, so the diagnostic processing is performed effectively.