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Patent Searching and Data


Title:
ELIMINATING CIRCUIT FOR POLARIZED WAVE INTERFERENCE
Document Type and Number:
Japanese Patent JPS5856545
Kind Code:
A
Abstract:

PURPOSE: To speed up the control, by controlling the compensation coefficient through the change of combinations of addition and subtraction of the real and imaginary parts of a discrimination error signal in response to a quadrant where the signal exists, when the value of the real and imaginary parts of an interference polarized wave reception signal is equal.

CONSTITUTION: Horizontal and vertical polarized wave reception signals HO and VO are inputted to a polarized wave interference subtraction circuit 6 and the signal VO is inputted to an interference discriminator 3". A compensation coefficient Ω is multiplied with the signal VO at the circuit 6, and the result is summed up with the signal HO to output an interference wave eliminating signal He. The signal He is inputted to a discrimination error detector 1 to output a discrimination error signal (e) from a detector 1. The real and imaginary parts eR and eI of the signal (e) are respectively inputted to correlation devices 2∼2''' to calculate eR+eI and eR-eI and each correlation device outputs a signal corresponding to each quadrant to a switch 4'. The discriminator 3" detects that the absolute value of the real and imaginary parts of the signal VO is equal and gives a control signal to select the output of the correlation devices 2∼2''' depending to which quadrand the signal belongs, to a switch 4 and gives the signal selected at the switch 4 to the circuit 6 via an LPF 5 as the coefficient Ω.


Inventors:
NAMIKI JIYUNJI
Application Number:
JP15397181A
Publication Date:
April 04, 1983
Filing Date:
September 30, 1981
Export Citation:
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Assignee:
NIPPON ELECTRIC CO
International Classes:
H04J11/00; H04B7/00; H04L27/06; H04L27/38; (IPC1-7): H04J11/00
Attorney, Agent or Firm:
Naotaka Ide