PURPOSE: To apply vertical synchronism surely even if a vertical synchronizing signal is small by outputting the vertical synchronizing signal extracted in an input video signal while being superposed when the vertical synchronizing signal is smaller than a preset value.

CONSTITUTION: The extracted vertical synchronizing signal D is inputted to two comparators 2, 3 via a transistor (TR)1 and compared with reference voltages Va, Vc. Since biases Vb, Vd are applied to the input signal, input sensitivities Vr, Vs of the comparators 2, 3 depend on Va-Vb, Vc∼Vd and are set as Vr>Vs. When an input being the input sensitivity Vr or over exists, a wide pulse is obtained in a capacitor via TRs 4, 5, an output is obtained from the comparator 3 when the input is larger than the input sensitivity Vs, an output is obtained from the comparator 3 and a pulse J is outputted via a TR6, an integration circuit and TRs 7, 8. In the latter case, since the pulse J is a negative pulse, a TR10 is turned off and a TR11 is turned on, the vertical synchronizing signal is superposed on a video signal L.