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Title:
SEMICONDUCTOR DEVICE
Document Type and Number:
Japanese Patent JPS59172271
Kind Code:
A
Abstract:

PURPOSE: To improve gains at extra-high frequency by mounting a grounding terminal chip reducing ground inductance by shortening the length of a wiring.

CONSTITUTION: With a semiconductor chip 21 into which a predetermined field- effect transistor is formed, bonding pads for a source electrode, a drain electrode and a gate electrode are shaped to the surface. A dielectric substrate is loaded on a grounding substrate 22. Grounding terminal chips 23 are fixed to the grounding substrate 22 while being adjoined to the semiconductor chip 21 by a brazing material 24 together with the semiconductor chip 21. The chips 23 consist of small pieces made of a good conductive metal with thickness equal to the semiconductor chip 21, and are composed preferably of gold foil pieces. Metallic wires 25 are grounded by connecting prescribed electrode pads and the terminal chips 23 through wire bonding after fixation.


Inventors:
KOSEMURA KINSHIROU
SHIGAKI MASAFUMI
Application Number:
JP4528783A
Publication Date:
September 28, 1984
Filing Date:
March 19, 1983
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H01L29/812; H01L21/338; H01L21/52; H01L23/12; H01L23/66; (IPC1-7): H01L21/58; H01L23/12; H01L23/36
Domestic Patent References:
JPS5368074A1978-06-17
Attorney, Agent or Firm:
Aoki Akira



 
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