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Title:
MULTIPLIER
Document Type and Number:
Japanese Patent JPH04129405
Kind Code:
A
Abstract:

PURPOSE: To realize the multiplier with a few circuit components by using a changeover switching signal whose phase is switched as noninverting and inverting phase so as to apply switching control to one switch of a switched capacitor thereby multiplying the clock signal with an input signal.

CONSTITUTION: A switching means 4 receive switching signals K1, XK1, K2, XK2 of a switched capacitor filter generates changeover switching signals K1', XK1', K2', XK2' whose phases are switched noninvertingly and invertingly with respect to the switching signals K1, XK1, K2, XK2 in response to a level of a clock signal fed from a terminal 5. Then the changeover switching signals K1', XK1', K2', XK2' are fed to one switch SA of the switched capacitor CA, SA, SB, forming a resistor of an input stage of a filter circuit 1 and the clock signal is multiplied with the input signal. Thus, a few circuit components are enough and the circuit scale of the circuit employing lots of multipliers is reduced.


Inventors:
SEGAWA YUJI
GOTO KUNIHIKO
INAMI NOBORU
Application Number:
JP25105990A
Publication Date:
April 30, 1992
Filing Date:
September 20, 1990
Export Citation:
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Assignee:
FUJITSU LTD
FUJITSU DEVICES INC
International Classes:
H03C1/00; H04K1/04; H04L9/06; H04L9/14; (IPC1-7): H03C1/00; H04L9/06; H04L9/14
Attorney, Agent or Firm:
Tadahiko Ito (2 outside)



 
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