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Title:
FIELD EFFECT TRANSISTOR
Document Type and Number:
Japanese Patent JPS59111371
Kind Code:
A
Abstract:

PURPOSE: To enable to selectively supply a plurality of voltages, having preset values differing from each other for load, by a method wherein a specific semiconductor laminated material, formed on a semiinsulating semiconductor substrate consisting of GaAs, is provided on the titled transistor.

CONSTITUTION: The semiconductor layer K1, with which a semiconductor laminated material 31 is composed, has relatively high n type impurity density, a semiconductor layer K2 has a relatively high p type impurity density, and semiconductor layers K3 and K8 have a relatively small electron affinity and a relatively high n type impurity density. Semiconductor layers K5 and K6 have a relatively large electron affinity and a relatively low impurity density which is different from that of the semiconductor layers K5 and K6. A load current can be brought under control by regulating the voltage between a gate electrode G1 and a source electrode 32, and a gate electrode G2 and the source electrode 32. A current is obtained by the movement of an electron passing through either of electron accumulation layers E1 and E2 or both of them, thereby enabling to selectively supply three kinds of load currents having different value with each other.


Inventors:
TSUBAKI KOUTAROU
KUMABE KENJI
Application Number:
JP22071382A
Publication Date:
June 27, 1984
Filing Date:
December 16, 1982
Export Citation:
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Assignee:
NIPPON TELEGRAPH & TELEPHONE
International Classes:
H01L29/812; H01L21/338; H01L29/778; (IPC1-7): H01L29/201
Attorney, Agent or Firm:
Shoji Tanaka



 
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