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Patent Searching and Data


Title:
DECODER CIRCUIT
Document Type and Number:
Japanese Patent JPS5911593
Kind Code:
A
Abstract:

PURPOSE: To attain a decoder circuit suitable for high circuit integration, by connecting a pair of input signals having opposite polarity at an effective period of the signal in common with a gate of a transistor (TR) with two wirings possible for being cut with a laser beam, for using a TR only, which had bead required for two TRs to a pair of input signals in conventional method.

CONSTITUTION: Before the logic of a decoder is constituted by a laser beam, a gate potential of a TRQ31 is set to an H level through a wiring T30, and a TRQ31 turns on. Further, since the signal is kept to an L level, a TRQ32 turns off. On the other hand, when the logic of the decoder is constituted with the laser beam, wirings T20, T30 are cut off. Thus, the signal I is set to an H level and a gate signal of the TRQ31 is set to an L level, and a signal II is set to an L level. Thus, the TRQ30 is turned off, input signals Ao, Ao',WAm, Am' are transmitted to inputs Ao1, Ao1'WAm1, Am1', and the decoder circuit is activated by cutting off one of wirings T12, T13; T14, T15; and T16, T17, and the state of logic of an output W is determined corresponding to the input signals Ao, Ao',WAm, Am'.


Inventors:
ICHIYAMA TOSHIO
Application Number:
JP12021882A
Publication Date:
January 21, 1984
Filing Date:
July 09, 1982
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G11C11/413; G11C11/34; G11C29/00; G11C29/04; H03K19/20; (IPC1-7): G11C8/00; H03K19/20
Attorney, Agent or Firm:
Masuo Oiwa