PURPOSE: To attain highly accurate control by utilizing a dummy word line so as to simulate the level increase at the remotest end of the word line thereby discriminating an optimum level so as to start a word line bootstrap circuit.

CONSTITUTION: External address signals AX0WAXn are fetched to an address buffer ADB in synchronizing with a timing signal ar formed by a row address strobe signal RAS and fed to a row decoder R-DCR and also the selecting operation of the prescribed word line and dummy word line is attained by using a word line selection timing signal x. This timing signal x is inputted to the boostrap circuit x-B so as to boost the potential of the selected word line WL to a voltage over power supply voltage Vcc. Further, external address signals AY0WAYn are fetched to an address buffer ADB in synchronizing with a timing signal ac formed by a column address strobe signal CAS, fed to a column decoder C-DCR and the data line is selected by a data line selection timing signal y.