PURPOSE: To stably control a tracking even at the time of special reproduction.

CONSTITUTION: A reproduced bit clock following the frequency change of a reproduced signal is generated by a PLL circuit 41. The reproduced bit clock is frequency-divided by a frequency divider 42 and given to an A/D converter 43 and a main detective circuit 44. The reproduced signal is changed into a digital signal by the A/D converter 43 and given to BPFs 45 and 48. The frequency characteristics of the BPFs 45 and 48 are changed in accordance with the output clock of the frequency divider 42. That is, even when the frequency of a reproduced pilot signal is changed at the time of special reproduction or the like, the frequency characteristics of the BPFs are changed corresponding to the change, so that, the reproduced pilot signal can be extracted. Thus, even at the time of special reproduction, the crosstalk of the reproduced pilot signal can be extracted to surely obtain a tracking error signal.