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Patent Searching and Data


Title:
TRANSIMPEDANCE AMPLIFIER
Document Type and Number:
Japanese Patent JP2004248025
Kind Code:
A
Abstract:

To provide a transimpedance amplifier capable of reducing a harmful effect such as parasitic capacitance or the like without using a feedback resistor to be thereby able to restrain the distortion of an output voltage converted from an input current when the input current is a high-speed signal.

The transimpedance amplifier is equipped with a MOS transistor Q1 whose gate is grounded via a capacitor CG1 for an alternate current and a MOS transistor Q2 that is subjected to cascode connection with the MOS transistor Q1, whose gate is grounded via a capacitor CG2 for the alternate current, and further whose drain is connected to a load resistor RL. The input current Iin is supplied to a common junction of the MOS transistors Q1 and Q2, so that the output voltage depending on the input current Iin is obtained from the load resistor RL.


Inventors:
KAWAKAMI MASAYUKI
Application Number:
JP2003036604A
Publication Date:
September 02, 2004
Filing Date:
February 14, 2003
Export Citation:
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Assignee:
SEIKO EPSON CORP
International Classes:
H03F1/32; H03F1/22; H03F3/08; (IPC1-7): H03F3/08; H03F1/22; H03F1/32
Attorney, Agent or Firm:
Masahiko Ueyanagi
Fujitsuna Hideyoshi
Osamu Suzawa