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Title:
TRANSMISSION AND RECEPTION CIRCUIT
Document Type and Number:
Japanese Patent JP3159144
Kind Code:
B2
Abstract:

PROBLEM TO BE SOLVED: To transfer a signal from a bus arbitration circuit and a signal from other transceiver circuit to a transceiver circuit whose operating speed is slow even in the case that maximum operating speeds of a plurality of transceiver circuits in IEEE1394 physical layer circuits differ in an IEEE1394 serial bus.
SOLUTION: A bus arbitration circuit 1 reads information to decide an operating speed of a transceiver circuit from a register circuit 4 to adjust operating speeds of a plurality of transceiver circuits 10, 11, 20. The register circuit 4 is provided with a speed setting circuit to write a setting value of the operating speed externally to make operating speeds of pluralities of transceiver circuits 10, 11, 20 whose transmission speeds differ in matching with each other.


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Inventors:
Asahi Saito
Application Number:
JP26825197A
Publication Date:
April 23, 2001
Filing Date:
September 16, 1997
Export Citation:
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Assignee:
NEC
International Classes:
H04B10/11; H04B10/27; H04L12/40; H04L12/70; H04L12/64; (IPC1-7): H04L12/40
Domestic Patent References:
JP7222263A
JP8293879A
Attorney, Agent or Firm:
Yasuo Suzuki (1 person outside)