Title:
ユニバーサルプロセスキット
Document Type and Number:
Japanese Patent JP7098273
Kind Code:
B2
Abstract:
The implementations described herein generally relate to a process kit suitable for use in a semiconductor process chamber, which reduces edge effects and widens the processing window with a single edge ring as compared to conventional process kits. The process kit generally includes an edge ring disposed adjacent to and surrounding a perimeter of a semiconductor substrate in a plasma chamber. A dimension of a gap between the substrate and the edge ring is less than about 1000 μm, and a height difference between the substrate and the edge ring is less than about (+/−) 300 μm. The resistivity of the ring is less than about 50 Ohm-cm.
Inventors:
Olivier Jubert
Jason Akeny
Sunil Surinivasan
James Rogers
La Ginder Dindosa
Bedaplum S Achusaraman
Olivier Lele
Jason Akeny
Sunil Surinivasan
James Rogers
La Ginder Dindosa
Bedaplum S Achusaraman
Olivier Lele
Application Number:
JP2017023919A
Publication Date:
July 11, 2022
Filing Date:
February 13, 2017
Export Citation:
Assignee:
APPLIED MATERIALS,INCORPORATED
International Classes:
H01L21/3065; H01L21/31; H01L21/683; H05H1/46
Domestic Patent References:
| JP2010251723A | ||||
| JP2008244096A | ||||
| JP2010016363A | ||||
| JP2001516948A | ||||
| JP2013511847A |
Attorney, Agent or Firm:
Yoshiaki Anzai