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Title:
UPLOAD CONTROLLER
Document Type and Number:
Japanese Patent JPH05210604
Kind Code:
A
Abstract:

PURPOSE: To provide the upload controller which can collect surely memory information required for analyzing a fault by requesting an upload processing by a host computer, even if an abnormal state is generated in an arithmetic processing part and a bus control part, etc., due to a fault of a communication processor.

CONSTITUTION: In an upload controller 2, an address latch 4 for storing a memory address, a length counter 5 for storing length for showing the transfer quantity of transfer data, a command decoder 6 for storing a memory address of a data area of a communication processor 3 which becomes an object of an upload processing contained in data, when an upload request command is detected from data outputted by a host computer 1, in the address latch 4 and storing the length contained in the data in the length counter 5, a DMA controller 7 for controlling a transfer of the object data of the upload processing, and a data buffer 8 for storing the transferred data are connected through an internal bus 9.


Inventors:
SAKUYAMA HIROAKI
Application Number:
JP1578292A
Publication Date:
August 20, 1993
Filing Date:
January 31, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F13/00; (IPC1-7): G06F13/00
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)



 
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