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Title:
VERTICAL DEFLECTING CIRCUIT
Document Type and Number:
Japanese Patent JPS5498113
Kind Code:
A
Abstract:

PURPOSE: To eliminate the fluctuation of the black level of video signals dependent upon the amplitude fluctuation of a vertical deflecting current by clamping the start position of the vertical deflecting current waveform in DC in a vertical deflecting circuit.

CONSTITUTION: Operational amplifier 6 amplifies the triangular wave, which is vertical deflecting signals inputted to the non-inversion input terminal of amplifier 6, and supplies the amplified output to terminal a of vertical deflecting coil L. The level at the operation start point of the triangular wave which appears every one vertical beam scanning period is clamped at the earth level. The reference voltage generated from reference DC voltage generation source 7 is applied to terminal b of vertical deflecting coil L through resistance R2. Consequently, the clamp position of the triangular wave is set to a DC level where the black position is scanned. As a result, the signal part dependent upon the black mask which is obtained at the trailing edge of the vertical beam blanking period can be always clamped by clamp pulses, and the black level can be taken out stably.


Inventors:
YOKOGAWA SUMIO
WATANABE YASUAKI
Application Number:
JP484978A
Publication Date:
August 02, 1979
Filing Date:
January 20, 1978
Export Citation:
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Assignee:
VICTOR COMPANY OF JAPAN
International Classes:
H04N3/16; H04N5/228; (IPC1-7): H04N3/16



 
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