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Patent Searching and Data


Title:
VIDEO SIGNAL PROCESSOR
Document Type and Number:
Japanese Patent JPS6416189
Kind Code:
A
Abstract:
PURPOSE:To prevent a gain control action and a clamp action from being mutually interfered and to prevent a malfunction by executing the reproducing of the direct current components of a gain control and an input signal, executing an A/D converting, thereafter, executing an amplitude limiting, decreasing a bit length, writing it to a memory and executing a processing with a microcomputer. CONSTITUTION:After a signal is converted to a digital signal by an A/D converter 3, an amplitude limiting is executed by an amplitude limiting circuit 4 and the word length of four bits is obtained. The output of the amplitude limiting circuit 4 and the output of a latch circuit 5 are synthesized and one word is obtained and written through a memory control circuit 6 to the memory. After the transfer of data to an RAM is ended, to the data of this memory, the processing is executed by the microcomputer composed of an RAM 7, an ROM 8 and a CPU 9 and the calculation of a clamp level control signal (c) and the calculation of a gain control signal (b) are executed and sent from an output port 10. Thus, the gain control action and the clamping action are mutually interfered and the processing is executed without the malfunction.

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Inventors:
KAWAHARA ISAO
Application Number:
JP17319287A
Publication Date:
January 19, 1989
Filing Date:
July 10, 1987
Export Citation:
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Assignee:
MATSUSHITA ELECTRIC IND CO LTD
International Classes:
H03M1/18; H04N19/42; H04N19/423; H04N19/46; H04N19/70; H04N19/85; (IPC1-7): H03M1/18; H04N7/13
Attorney, Agent or Firm:
Toshio Nakao