Title:
VITERBI DECORDER
Document Type and Number:
Japanese Patent JP3229047
Kind Code:
B2
Abstract:
PURPOSE: To lower a decoding error rate by smoothing envelope information related to reception signals, increasing the reliability of branch metric and adding prescribed metric obtained by using a part or all of composite information further to pass metric.
CONSTITUTION: The soft judgement information of soft judged reception signals is inputted to an input terminal Ta and the envelope information of the reception signals is inputted to the input terminal Tb. The envelope information of the reception signals inputted from the input terminal Tb is inputted to a smoothing circuit 1, smoothed and supplied to a branch metric calculation circuit along with the reception signals inputted from the input terminal Ta. Also, the branch metric is added to the pass metric of a previous stage stored in a pass metric storage means provided inside an ACS circuit 5, the pass metric of all passes capable of transition to the state is calculated and compared and the pass corresponding to the pass metric of maximum likelihood is selected.
Inventors:
Nobuyasu Nakajima
Tomoko Matsushima
Tomoko Matsushima
Application Number:
JP34895692A
Publication Date:
November 12, 2001
Filing Date:
December 28, 1992
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H04L1/00; H03M13/23; H03M13/41; H04L25/08; (IPC1-7): H03M13/41; H04L1/00; H04L25/08
Domestic Patent References:
| JP5205395A |
Attorney, Agent or Firm:
Hidekazu Miyoshi (1 outside)