Title:
VOLTAGE BOOSTER FOR NONVOLATILE MEMORY
Document Type and Number:
Japanese Patent JP2638533
Kind Code:
B2
Abstract:
PURPOSE: To obtain a voltage booster for a nonvolatile memory.
CONSTITUTION: The voltage booster 1 comprises a charge pump 2 for generating a boost voltage Vboost on a boost line 3. The booster includes a voltage divider 5 to which a voltage V1 proportional to the boost voltage Vboost is applied, and also includes a comparator 6 to which a reference power 4 having a low reference voltage is applied, so that the charge pump 2 is put in its enable or disable state depending on a comparison result. A voltage limiter 8 is connected between the boost line 3 and ground. Further, a boost circuit 7 accelerates a voltage increase when the boost line is operated with low power, but a bus leading to the ground is made short to provide less power consumption.
Inventors:
RUIJI PASUKATSUCHI
SHIRUBIA PADOAN
KAARA MARIA GOTSURA
SHIRUBIA PADOAN
KAARA MARIA GOTSURA
Application Number:
JP33746394A
Publication Date:
August 06, 1997
Filing Date:
December 28, 1994
Export Citation:
Assignee:
ETSUSE JI ETSUSE TOMUSON MIKUROERETSUTORONIKA SPA
International Classes:
G11C17/00; G11C5/14; G11C16/06; H02M3/07; (IPC1-7): G11C16/06
Domestic Patent References:
| JP59186200A | ||||
| JP528786A |
Other References:
【文献】国際公開93/5513(WO,A)
Attorney, Agent or Firm:
Keiichi Yamamoto