VOLTAGE DETECTING CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE

Title:

VOLTAGE DETECTING CIRCUIT AND METHOD FOR SEMICONDUCTOR MEMORY DEVICE

Document Type and Number:

Japanese Patent JP2003317476

Kind Code:

A

Abstract:

To provide technique for monitoring reference voltage generated in a semiconductor memory device to simplify memory access operation.

A pair of Schmitt trigger circuits are used. The first Schmitt trigger circuit detects that voltage appearing on an output of a reference voltage generator is dropped to a lower level than the minimum threshold voltage level. The second Schmitt trigger circuit detects that output voltage of the reference voltage generator exceeds the maximum threshold voltage level. This circuit can have a reset circuit giving initially the prescribed voltage level on an input of the Schmitt trigger circuit. The output circuit receives an output of each Schmitt trigger circuit and generates an output signal having a value indicating whether an output of the reference voltage generator is in a voltage range or not.

Inventors:

LAURENT DUANE GILES

Application Number:

JP2003112529A

Publication Date:

November 07, 2003

Filing Date:

April 17, 2003

Export Citation:

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Assignee:

ST MICROELECTRONICS INC

International Classes:

H03K19/00; G11C5/14; G11C11/407; (IPC1-7): G11C11/407; H03K19/00

Attorney, Agent or Firm:

Masaaki Kobashi

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