To reduce the source-to-drain voltage of a first, a second N-MOS transistor and improve the reliability of a circuit by cascade-connecting a third, a fourth N-MOS transistor respectively to each drain of the first, second N-MOS transistors which are cross-couple-connected and impressing a relaxation signal.
Each drain of cross-couple-connected N-MOS transistors N1, N2 is connected with a voltage relaxation section 10 composed of an N-MOS transistor N3 and an N-MOS transistor N4. A level judging circuit 2 supplies a relaxation signal ALV at an H level(3.3 V) to a node nAL when a voltage VNN supplied to a node nVN is more than -4V and supplies the relaxation signal ALV at an L level (0 V) to the node n-AL when the voltage VNN supplied to the node nVN is less than -4 V.
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TATEWAKI YASUHIKO