Title:
VOLTAGE TYPE PULSE WIDTH MODULATION INVERTER
Document Type and Number:
Japanese Patent JPS5851775
Kind Code:
A
Abstract:
PURPOSE:To automatically adjust the decelerating time for variously varying load states by providing a decelerating time limiter. CONSTITUTION:A DC line voltage which is supplied to an inverter is detected in a voltage detector 10, and when a DC line voltage rises, and the decelerating time setting of an input limiter 2 is switched through a decelerating time switching circuit 11, thereby switching the gradient of the output voltage line to low gradient one. When the line voltage abnormally rises, a signal synthesizer 8 is driven by a signal from the detector 10, thereby breaking all transistors T1- T6, and driving an abnormal time signal output circuit 12 to trip a contact 13. Thus, the input voltage of the inverter is interrupted.
Inventors:
ANDOU CHIHIRO
Application Number:
JP15129581A
Publication Date:
March 26, 1983
Filing Date:
September 24, 1981
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H02M7/48; (IPC1-7): H02M7/48; H02P13/20
Attorney, Agent or Firm:
Takehiko Suzue
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