WAFER DEVICE, CHIP DEVICE AND MANUFACTURE OF THE CHIP DEVICE

Title:

WAFER DEVICE, CHIP DEVICE AND MANUFACTURE OF THE CHIP DEVICE

Document Type and Number:

Japanese Patent JP2000068271

Kind Code:

A

Abstract:

To manufacture simply a chip-size package CSP and moreover lessen the effects of thermal shrinkage due to downsizing.

Au bumps 12 are formed on Al pads 10 on the surface of an Si wafer 9, a layer of first resin 13 is formed on the Si wafer 9 surface, the surface of the first resin 13 is polished until the tips of the Au bumps 12 appear, a conductive layer 14 is formed on the surface of the first resin 13, so that one end is connected to the Au bump 12 and the other end is disposed in a matrix form on the surface of the first resin 13, conductive bumps 15 are formed the other end parts of the conductive layer 14, a layer of a second resin 16 is formed on the surface of the first resin 13 layer, and finally the surface of the second resin 16 is polished until the tips of the conductive bumps 15 appear so as to make the surface of the second resin 16 layer flat, thus manufacturing a wafer device. By having the wafer device cut, chip devices are manufactured.

Inventors:

SHIMAZAKI SHINJI

Application Number:

JP23397598A

Publication Date:

March 03, 2000

Filing Date:

August 20, 1998

Export Citation:

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Assignee:

MATSUSHITA ELECTRIC IND CO LTD

International Classes:

H01L23/52; H01L21/301; H01L21/3205; H01L21/60; H01L23/12; (IPC1-7): H01L21/3205; H01L21/301; H01L21/60; H01L23/12

Attorney, Agent or Firm:

Matsumura Hiroshi

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