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Title:
WAFER PROCESSING METHOD
Document Type and Number:
Japanese Patent JP2016111139
Kind Code:
A
Abstract:
PROBLEM TO BE SOLVED: To provide a processing method of a wafer in which a surface side of the wafer is formed to be a flat surface.SOLUTION: A processing method of a semiconductor wafer 2 in which devices 222 are formed in a plurality of regions partitioned by a plurality of division scheduled lines 221 formed on a surface and the devices 222 and another region have irregularities comprises: a SiOfilm coating step of coating the surface of the wafer with a SiOfilm 23; a resist film coating step of coating a recess on a surface of the SiOfilm 23 with a resist film 24; an etching step of etching a salient of the SiOfilm 23 on the surface of the wafer after the resist film coating step to keep a height almost in line with a height of the recess; a resist film removal step of removing the resist film 24 coated on the surface of the SiOfilm 23 which coats the surface of the wafer after the etching process; and a SiOfilm flattening step of flattening the surface of the SiOfilm 23 which coats the surface f the wafer after the resist film removal step.SELECTED DRAWING: Figure 5

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Inventors:
MATSUZAKI SAKAE
ARAI KAZUNAO
Application Number:
JP2014246064A
Publication Date:
June 20, 2016
Filing Date:
December 04, 2014
Export Citation:
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Assignee:
DISCO ABRASIVE SYSTEMS LTD
International Classes:
H01L21/304; B24B7/04; B24B37/04
Domestic Patent References:
JP2013048188A2013-03-07
JP2008130576A2008-06-05
JP2012174956A2012-09-10
Attorney, Agent or Firm:
Naozumi Ono
Sachiko Okunuki
Sayaka Hirakawa
Toshiyuki Kojima