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Title:
ウェーハの加工方法
Document Type and Number:
Japanese Patent JP7098222
Kind Code:
B2
Abstract:
To provide a wafer processing method capable of preforming an alignment process through a sealing material including a carbon black coated on a surface of a wafer.SOLUTION: A method for processing a wafer in which a surface of a device wafer in which a device is formed in each of the chip regions partitioned by the plurality of division schedule lines formed on a surface crisscross is sealed by a sealing material and a plurality of bumps are formed in each of the regions of the sealing material comprises: an alignment step of detecting an alignment mark by transmitting the sealing material from a surface side of the wafer by infrared ray imaging means and imaging the surface side of the device wafer and detecting the division schedule line to be cut on the basis of the alignment mark; and a dividing step of dividing the wafer into individual device chips in which a surface of each chip is sealed by the sealing material by cutting the wafer from the surface side of the wafer along the division schedule lines by a cutting blade after performing the alignment step. The sealing material has permeability such as allowing transmission of the infrared ray received by the infrared ray imaging means.SELECTED DRAWING: Figure 4

Inventors:
Katsuhiko Suzuki
Yuto Ban
Application Number:
JP2017178719A
Publication Date:
July 11, 2022
Filing Date:
September 19, 2017
Export Citation:
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Assignee:
Disco Co., Ltd.
International Classes:
B24B27/06; H01L21/301; B24B49/12; H01L23/29; H01L23/31
Domestic Patent References:
JP2015023078A
JP2015028980A
JP2017108089A
JP2005206621A
JP2013222887A
Attorney, Agent or Firm:
Matsumoto
Tomohiro Okamoto
Takahiro Kasahara



 
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