Title:
WARPAGE CONTROLLER FOR SEMICONDUCTOR WAFER
Document Type and Number:
Japanese Patent JPS5769740
Kind Code:
A
Abstract:
PURPOSE:To obtain a flatness capable of exposing and drawing accurately a wafer by emitting a laser of the output determined in response to the warpage and remaining stress to the semiconductor wafer, thereby controlling the warpage of the wafer. CONSTITUTION:A semiconductor wafer 5 fed via a conveying mechanism is placed on an X-Y stage 3. The flat state of the wafer 5 is measured by an optical micrometer 6 as a detected provided to be faced upwardly of the wafer 5. The measured value is compared with preinputted data, and the stage 3 is driven in accordance with the compared result. The wafer 5 is emitted under the emitting conditions based on the measured value by a laser beam L. In this manner, the warpage of the wafer 5 can be readily controlled.
More Like This:
| JP2553078 | [Title of Invention] Mask forming method |
| JPS6184021 | MASK ALIGNER |
| JPH04162513 | DEVELOPING NOZZLE FOR PHOTORESIST FILM |
Inventors:
ISHIDA MASAHIRO
TAKASU SHINICHIROU
TAKASU SHINICHIROU
Application Number:
JP14642680A
Publication Date:
April 28, 1982
Filing Date:
October 20, 1980
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
H01L21/30; G01B11/30; H01L21/027; (IPC1-7): H01L21/30