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Patent Searching and Data


Title:
WAVEFORM EQUALIZATION CIRCUIT
Document Type and Number:
Japanese Patent JPH04125804
Kind Code:
A
Abstract:

PURPOSE: To cancel the pseudo signal of a straight polarity and to improve a read margin by delaying an input signal waveform by prescribed time, attenuating it in a prescribed level and synthesizing it.

CONSTITUTION: The signal waveform having the pseudo signal of the straight polarity is inputted to a delay circuit 17 and an operational amplifier 19 from an amplifier circuit 14. The circuit 17 delays the signal waveform for previously decided time and transmits it to a variable attenuation circuit 18. The terminates the circuit 17 by the charactersitic impedance of the circuit 17 and the signal waveform transmitted from the circuit 17 is attenuated to the prescribed level without reflecting. The waveform whose amplitude becomes small is transmitted to the operational amplifier 19. Since the amplifier 19 subtracts the signal waveform from the circuit 14 and the waveform from the circuit 18, the signal waveform where the pseudo signal is cancelled is transmitted to the output-side of the amplifier 19. Thus, noise at the time of reproducing data is reduced and the read margin can be improved.


Inventors:
HAMURA YOSHIHIRO
NAKAMURA SUNAO
Application Number:
JP24651190A
Publication Date:
April 27, 1992
Filing Date:
September 17, 1990
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
G11B5/09; H03H11/04; (IPC1-7): G11B5/09; H03H11/04
Attorney, Agent or Firm:
Sadaichi Igita