PURPOSE: To attain ease of adjustment of the phase of a clock signal with high accuracy and miniaturization by applying digital-analog conversion to an output signal of plural ROMs after being summed digitally.
CONSTITUTION: Since a weighting circuit is so constituted that output signals of ROMs 131, 132 are subjected to digital addition 17 and the result is subjected to digital analog conversion by a digital/analog converter 14, a highly accurate circuit is obtained. Since output signals of plural ROMs 131, 132 are added digitally and subjected to digital-analog conversion in this way, one of said circuit 14 is enough, the transmitter is miniaturized by the share and it is not required to adjust the phase of the clock signal, then adjustment is attained easily.
CHIBA YOSHIYUKI
JPS5546695A | 1980-04-01 | |||
JPS52109352A | 1977-09-13 |