PURPOSE: To easily execute the adjustment for minutely dividing a waveform by providing first and second charge transfer delaying circuits, a clock circuit and an arithmetic circuit, and adjusting a time difference of first and second delay waveforms by adjusting a frequency of a clock signal for driving first and second charge transfer delaying circuits.

CONSTITUTION: An input waveform A passes through a low-pass filter 24 for eliminating noise and inputted to each CCD delaying circuit 25, 26 and 27. Frequencies f1, f2 and f3 of clock signals of the CCD delaying circuits 25, 26 and 27 are set as f2<f1<f3, and each delay time difference is all set to the same. In this regard, a clock circuit 31 adjusts values of the frequencies f1, f2 and f3, and when an original waveform A is asymmetrical, the waveform which is shaped goes to symmetrical by putting a difference in f1-f2 and f3-f1. Subsequently, by adding the second and the third delay waveforms and executing a level adjustment, a compensated waveform E is formed. When the compensated waveform E is subtracted from the first delay waveform C by an operational amplifier 33, minutely divided waveform F can be obtained in an output terminal 39.