WET CLEANING METHOD OF MATERIAL SURFACE AND MANUFACTURING PROCESS OF ELECTRONIC, OPTICAL OR OPTOELECTRONIC DEVICE USING THE SAME

Title:

WET CLEANING METHOD OF MATERIAL SURFACE AND MANUFACTURING PROCESS OF ELECTRONIC, OPTICAL OR OPTOELECTRONIC DEVICE USING THE SAME

Document Type and Number:

Japanese Patent JP2005244179

Kind Code:

A

Abstract:

To provide a wet cleaning method of material surface solving the problems of conventional technologies, which do not have the faults, restrictions, defects, and disadvantageous points of the cleaning method of the conventional technologies, and to provide a manufacturing process for an electronic, optical or optoelectronic device which uses the same.

A wet cleaning method of material surface comprises the following successive processes; (a) a process of bringing the surface into contact with an HF solution; (b) a process of rinsing the surface with acidified deionized water and then adding a powerful oxidizing agent to the deionized water to continue rinsing; (c) a process for repeating the process (a) once or twice as needed, while reducing the time of the continuance of contacts according to the need; (d) a process of repeating the process (b) once or twice according to need; and (e) a process of drying the surface. A manufacturing process of an electronic, optical or optoelectronic device, such as a CMOS or MOSFET device, comprises at least one wet cleaning process which uses the cleaning method.

More Like This:

WO/2022/260128	SUBSTRATE PROCESSING SYSTEM, AND SUBSTRATE PROCESSING METHOD
JPH02188919	ANGULE POLISHING JIG
JP2022189632	ELECTRODEPOSITION WIRE AND METAL WIRE FOR SAW WIRE, AND MANUFACTURING METHOD OF ELECTRODEPOSITION WIRE FOR SAW WIRE

Inventors:

ABADIE ALEXANDRA
BESSON PASCAL
SEMERIA MARIE-NOELLE

Application Number:

JP2004382131A

Publication Date:

September 08, 2005

Filing Date:

December 28, 2004

Export Citation:

Click for automatic bibliography generation Help

Assignee:

COMMISSARIAT ENERGIE ATOMIQUE

International Classes:

H01L21/304; B08B3/08; C11D7/08; C11D11/00; H01L21/306; (IPC1-7): H01L21/304

Domestic Patent References:

JPH11340175A	1999-12-10
JPH07115077A	1995-05-02
JPH11114510A	1999-04-27
JPH11219926A	1999-08-10
JP2003086554A	2003-03-20
JP2002217158A	2002-08-02
JP2000317415A	2000-11-21
JP2001525612A	2001-12-11

Attorney, Agent or Firm:

Michiteru Soga
Michiharu Soga
Hidetoshi Furukawa
Suzuki Kenchi
Kajinami order
Nakamura Rei

Previous Patent: OXIDE FILM FORMATION METHOD FOR SEMICONDUCTOR ELEMENT

Next Patent: METHOD OF MANUFACTURING ELECTRONIC CIRCUIT UNIT