Title:
WIDE DEVIATION TRACKING FILTER
Document Type and Number:
Japanese Patent JPH01221016
Kind Code:
A
Abstract:
PURPOSE: To make possible the filtering processing of a wide deviation input signal under the existence of a noise by providing two output clock signals having fixed phases to a low frequency phase lock loop to be operated by the double frequency of a base input signal. CONSTITUTION: The rear edge of an input signal on a line 22 is compared in both its frequency and phase with a signal on a line 24 inside a phase detector or comparator 23, filtering processing is performed by a loop filter 26, and a frequency error voltage to be applied to a voltage controlled oscillator(VCO) 28 is applied onto a line 27. The function of a low frequency phase lock loop 20 and an exclusive OR gate 32 has the same frequency as the input signal on the line 22 but applies two outputs, of which the phases are exactly different just at 90 deg., on lines 31 and 24. An input signal to a high frequency phase lock loop 21 is operated as a fixed frequency F2 and has a high circuit Q and a low phase noise, and a crystal oscillator 43 is provided.
Inventors:
BOON ERU MAUA
Application Number:
JP30211188A
Publication Date:
September 04, 1989
Filing Date:
November 28, 1988
Export Citation:
Assignee:
UNISYS CORP
International Classes:
H03L7/07; H03H17/08; (IPC1-7): H03H17/08
Domestic Patent References:
| JPS61234624A | 1986-10-18 | |||
| JPS61230420A | 1986-10-14 | |||
| JPS58134525A | 1983-08-10 | |||
| JPS6094522A | 1985-05-27 | |||
| JPS574609A | 1982-01-11 | |||
| JPS5631729B2 | 1981-07-23 |
Attorney, Agent or Firm:
Fukami Hisaro (2 outside)