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Title:
WINDOW DISPLAY CIRCUIT
Document Type and Number:
Japanese Patent JPS63123120
Kind Code:
A
Abstract:

PURPOSE: To easily attain many window displayings by adding a control memory plane and an adder to a displaying circuit.

CONSTITUTION: A control memory plane 4 has an address coincident to a displaying memory plane 1 and is accessed by an address signal to designate successively the address in the displaying area at the displaying memory plane 1. An address 5 adds an address signal outputted from a displaying control part 2 and control data outputted from the control memory plane 4, and supplies and accesses the added value to a displaying memory plane as the address signal. To the control memory plane 4, the difference value (address difference) of the address signal with the part where the window displaying contents, a purpose, are stored into the area part to desire to execute the window displaying is stored. Thus, the arbitrary number of the window displayings can be easily executed at an arbitrary area.


Inventors:
ISHITOBI SHINJI
Application Number:
JP27008786A
Publication Date:
May 26, 1988
Filing Date:
November 13, 1986
Export Citation:
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Assignee:
NIPPON DENKI HOME ELECTRONICS
International Classes:
G06F3/048; G06F3/14; (IPC1-7): G06F3/14
Domestic Patent References:
JPS6017485A1985-01-29
JPS61215585A1986-09-25



 
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