Title:
無線通信装置及びデータ・インターフェース
Document Type and Number:
Japanese Patent JP4553941
Kind Code:
B2
Abstract:
A wireless communication device comprises a number of sub-systems operably coupled to a data interface for routeing data between the number of sub-systems. A clock generation function generates a clock signal substantially at a data transfer rate to be used over the data interface whereby the clock signal is generated at a rate that minimises harmonic content of the clock signal at operational frequencies of the wireless communication device. Thus, a suitable data rate is selected and supported by the data interface that accommodates the desired bandwidth, clock rate and/or chip rate of the functional elements that are coupled by the data interface within the wireless communication device, whilst minimising the effects of harmonic interference from the clock signal(s).
Inventors:
Okie, Connor Jay
Kelleher, Paul
Kelleher, Paul
Application Number:
JP2007529321A
Publication Date:
September 29, 2010
Filing Date:
September 06, 2004
Export Citation:
Assignee:
Freescale Semiconductor, Inc.
International Classes:
H04B1/40; H04B1/50; H04B15/06
Domestic Patent References:
| JP7015390A | ||||
| JP11215024A | ||||
| JP4064839U | ||||
| JP2006522502A | ||||
| JP2001217743A |
Foreign References:
| WO2004066515A1 |
Attorney, Agent or Firm:
Kazuo Shamoto
Shinjiro Ono
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita
Shinjiro Ono
Yasushi Kobayashi
Akio Chiba
Hiroyuki Tomita