Title:
WIRELESS SENSOR
Document Type and Number:
Japanese Patent JP2021010176
Kind Code:
A
Abstract:
To reduce power consumption of an analog-digital converter circuit.SOLUTION: An analog potential obtained in a sensor or the like is held in a sample-and-hold circuit including a transistor with an extremely low off-state current. In the sample-and-hold circuit, the analog potential is held in a node which is able to hold a charge by turning off the transistor. Then, power supply to a buffer circuit or the like included in the sample-and-hold circuit is stopped to reduce power consumption. In a structure where a potential is held in each node, power consumption can be further reduced when a transistor with an extremely low off-state current is connected to a node holding a potential of a comparator, a successive approximation register, a digital-analog converter circuit, or the like, and power supply to these circuits is stopped.SELECTED DRAWING: Figure 1
Inventors:
SHIONOIRI YUTAKA
KATO KIYOSHI
ATAMI TOMOAKI
KATO KIYOSHI
ATAMI TOMOAKI
Application Number:
JP2020163546A
Publication Date:
January 28, 2021
Filing Date:
September 29, 2020
Export Citation:
Assignee:
SEMICONDUCTOR ENERGY LAB CO LTD
International Classes:
H03M1/12; H01L21/8234; H01L21/8238; H01L27/06; H01L27/088; H01L27/092; H01L29/786; H03M1/46
Domestic Patent References:
| JP2013168926A | 2013-08-29 | |||
| JP2012044347A | 2012-03-01 | |||
| JP2014107674A | 2014-06-09 | |||
| JP2013012731A | 2013-01-17 | |||
| JP2012257201A | 2012-12-27 | |||
| JP2012063892A | 2012-03-29 |
Foreign References:
| US20110080925A1 | 2011-04-07 |