Title:
抵抗変化型不揮発性記憶素子の書き込み方法および抵抗変化型不揮発性記憶装置
Document Type and Number:
Japanese Patent JP4705998
Kind Code:
B2
Abstract:
A writing method optimum for a variable resistance element which can maximize an operation window of the variable resistance element is provided. The writing method is performed for a variable resistance element that reversibly changes between a high resistance state and a low resistance state depending on a polarity of an applied voltage pulse. The writing method includes a preparation step (S50) and a writing step (S51, S51a, S51b). At the preparation step (S50), resistance values of the variable resistance element are measured by applying voltage pulses of voltages that are gradually increased to the variable resistance element, thereby determining the first voltage V1 for starting high resistance writing and the second voltage V2 having a maximum resistance value. At the HR writing step (S51a), a voltage pulse having a voltage Vp that is equal to or higher than the first voltage V1 and equal to or lower than the second voltage V2 is applied to the variable resistance element, thereby changing the variable resistance element from the low resistance state (S52) to the high resistance state (S53).
Inventors:
Ken Kawai
Kazuhiko Shimakawa
Shunsaku Muraoka
Ryotaro Higashi
Kazuhiko Shimakawa
Shunsaku Muraoka
Ryotaro Higashi
Application Number:
JP2010538256A
Publication Date:
June 22, 2011
Filing Date:
June 08, 2010
Export Citation:
Assignee:
Panasonic Corporation
International Classes:
G11C13/00; H01L27/105; H01L45/00; H01L49/00
Domestic Patent References:
| JP2007188603A |
Foreign References:
| WO2008149484A1 |
Attorney, Agent or Firm:
Hiromori Arai