Title:
パルス幅変調器の集積回路に、シングルイベントアップセットに対する抵抗器を備えるための回路
Document Type and Number:
Japanese Patent JP4068620
Kind Code:
B2
Abstract:
A circuit for use with a pulse width modulated integrated circuit having a soft-start reset function comprising a diode having a first terminal connected to a soft-start reset terminal of the integrated circuit, a voltage divider coupled between a voltage reference and a common terminal for the integrated circuit, the diode having a second terminal coupled to a tap of the voltage divider and a soft-start capacitor coupled between the second terminal of the diode and the common terminal whereby upon power startup of the integrated circuit, the soft-start capacitor is charged by the tap of the voltage divider and wherein in the event of a single event upset condition, when the soft-start reset terminal of the integrated circuit is reduced to a level at or near the level of the common terminal of the integrated circuit, the diode prevents the soft-start capacitor from discharging through the integrated circuit.
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Inventors:
Steve Baker
Application Number:
JP2004553662A
Publication Date:
March 26, 2008
Filing Date:
November 13, 2003
Export Citation:
Assignee:
International Rectifier Corporation
International Classes:
H03K17/22; H02M1/00; H02M1/32; H02M1/36; H02M3/00; H03K3/02; H03K7/08; H02M7/00
Domestic Patent References:
| JP1248245A | ||||
| JP1155098A | ||||
| JP2000125550A | ||||
| JP2002208852A | ||||
| JP2000148309A | ||||
| JP2000358363A |
Attorney, Agent or Firm:
Masatake Shiga
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro
Takashi Watanabe
Yasuhiko Murayama
Shinya Mitsuhiro