Title:
The clock generation method for rise edge actuating systems
Document Type and Number:
Japanese Patent JP5986172
Kind Code:
B2
Abstract:
A method of converting an input clock to generate an output clock and providing a certain system with the output clock is provided. The method includes setting up a desired output clock value and a variable value and determining whether the input clock is the rising edge; adding the output clock value to the variable value to provide a calculated value when the input clock is the rising edge; comparing the calculated value with the input clock value; and outputting, when the calculated value is equal to or larger than the input clock value as a result of comparison, the output clock as logic state '1' and setting, a value obtained by subtracting the input clock value from the calculated value, as the variable value.
Inventors:
Rigigon
Application Number:
JP2014231377A
Publication Date:
September 06, 2016
Filing Date:
November 14, 2014
Export Citation:
Assignee:
LSIS CO.,LTD.
International Classes:
H04L7/02
Domestic Patent References:
| JP9223959A | ||||
| JP2000307419A | ||||
| JP2005045507A | ||||
| JP10079650A | ||||
| JP2009118334A | ||||
| JP4227330A |
Attorney, Agent or Firm:
Atsushi Aoki
Jun Tsuruta
Tomohiro Minamiyama
Akira Kawai
Kenichi Nakamura
Jun Tsuruta
Tomohiro Minamiyama
Akira Kawai
Kenichi Nakamura