Title:
Thin film transistor array substrate and display device including it
Document Type and Number:
Japanese Patent JP6309723
Kind Code:
B2
Abstract:
A thin-film transistor (TFT) array substrate including: a first conductive layer selected from an active layer, a gate electrode, a source electrode, and a drain electrode of a TFT; a second conductive layer in a layer different from the first conductive layer; and a connection node coupling the first conductive layer to the second conductive layer. Here, the TFT array has a node contact hole formed by: a first contact hole in the first conductive layer; and a second contact hole in the second conductive layer, the second contact hole being integral with the first contact hole and not being separated from the first contact hole by an insulating layer, and at least a portion of the connection node is in the node contact hole.
Inventors:
Park Gensei
Application Number:
JP2013169759A
Publication Date:
April 11, 2018
Filing Date:
August 19, 2013
Export Citation:
Assignee:
Samsung Display Co.,Ltd.
International Classes:
G09F9/30; H01L21/336; H01L29/786; H01L51/50
Domestic Patent References:
| JP2004272293A | ||||
| JP2008235499A | ||||
| JP2005165286A | ||||
| JP2005235765A |
Foreign References:
| WO2011162242A1 | ||||
| US20050078264 | ||||
| US20060139554 |
Attorney, Agent or Firm:
Takahashi Hayashi & Partners
Nobuyuki Matsunaga
Tetsuji Tsuji
Nobuyuki Matsunaga
Tetsuji Tsuji