METHOD FOR CONTROLLING DATA INPUT FROM DATA BUS

Title:

METHOD FOR CONTROLLING DATA INPUT FROM DATA BUS

Document Type and Number:

Japanese Patent JPH0713961

Kind Code:

A

Abstract:

PURPOSE: To provide a method for receiving data from a data bus at high speed.

CONSTITUTION: An input step 12 of a processor 10 has a temporary register 18 for storing data from the data bus at the edge of a 1st clock and a formation logic circuit 28 for sending the data from the data bus and the temporary register 18 to input registers 32 and 34 at the edge of a 2nd clock.

Inventors:

MAIKURU SHII GIRU
HENRII EMU DAARII
EJISON EICHI CHIU
JIEFUREI EI NIIHAUSU

Application Number:

JP8624994A

Publication Date:

January 17, 1995

Filing Date:

April 25, 1994

Export Citation:

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Assignee:

TEXAS INSTRUMENTS INC

International Classes:

G06F7/00; G06F7/544; G06F7/57; G06F17/10; (IPC1-7): G06F17/10; G06F7/00

Attorney, Agent or Firm:

Minoru Nakamura (6 outside)

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