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Title:
A manufacturing method of a heat dissipation board and the heat dissipation board
Document Type and Number:
Japanese Patent JP6028987
Kind Code:
B2
Abstract:
A heat dissipation substrate having a metallic layer with few defects on its surface is obtained by a process including the steps of: forming a metallic layer by plating on the surface of an alloy composite mainly composed of a powder of a principal metal, additional metal and diamond; and heating and pressurizing the alloy composite coated with the metallic layer, at a temperature equal to or lower than the melting points of the metallic layer and the alloy composite. Consequently a heat dissipation substrate is obtained which has a coefficient of linear expansion of 6.5 ppm/K or higher and 15 ppm/K or lower as well as a degree of thermal conductivity of 420 W/m·K or higher, the substrate having a metallic layer with few defects in its surface layer and thereby allowing for a Ni-based plating on which the void percentage in the solder joint will be 5 % or lower.

Inventors:
Akira Fukui
Application Number:
JP2016504238A
Publication Date:
November 24, 2016
Filing Date:
October 08, 2015
Export Citation:
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Assignee:
Semiconductor Thermal Laboratory Co., Ltd.
International Classes:
B22F3/24; H01L23/373; C22C26/00; C23C28/02
Domestic Patent References:
JP2014107468A2014-06-09
JP2005175006A2005-06-30
JP2002206170A2002-07-26
JP2010106362A2010-05-13
JP2013098491A2013-05-20
JPH1167991A1999-03-09
JP2004197153A2004-07-15
JPH10231175A1998-09-02
JP2008112893A2008-05-15
JP2009218541A2009-09-24
Foreign References:
WO2003040420A12003-05-15
WO2007074720A12007-07-05
Attorney, Agent or Firm:
Kyoto International Patent Office