Title:
A memory system, a control system, and a life prediction method
Document Type and Number:
Japanese Patent JP6104676
Kind Code:
B2
Abstract:
A memory system according to an embodiment may have an integration unit and a prediction unit. The integration unit may detect substrate current flowing through a substrate of a non-volatile memory when the non-volatile memory with a memory cell which has binary or multivalued being the binary or more is written/erased. The integration unit may records an integration value of the detected substrate current into a storage. The prediction unit may predict a lifetime of the non-volatile memory based on the integration value which is recorded on the storage.
Inventors:
Chen Jieji
Satoshi Tanamoto
Yuichiro Mitani
Marugame Takao
Satoshi Tanamoto
Yuichiro Mitani
Marugame Takao
Application Number:
JP2013075598A
Publication Date:
March 29, 2017
Filing Date:
April 01, 2013
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
G06F12/16; G11C16/02
Domestic Patent References:
| JP2011222107A | ||||
| JP9153600A | ||||
| JP2006194875A |
Foreign References:
| US6873932 |
Attorney, Agent or Firm:
Sakai International Patent Office