Title:
A method and a device for adjusting the reliability of data communications within an in-series bus system
Document Type and Number:
Japanese Patent JP6110534
Kind Code:
B2
Abstract:
In a bus system that includes at least two subscribed data processing units that exchange messages via a bus in a serial data transmission, the transmitted messages are of a logical structure that includes a start-of-frame bit, an arbitration field, a control field, a data field, a CRC field, an acknowledge field and an end-of-frame sequence, the control field including a data length code, which contains information regarding the length of the data field. The CRC field of the messages can include any of two or more different numbers of bits depending on a value of an associated switchover condition (UB3).
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Inventors:
Hartvic, Florian
Application Number:
JP2016046509A
Publication Date:
April 05, 2017
Filing Date:
March 10, 2016
Export Citation:
Assignee:
Robert Bosch GmbH
International Classes:
H04L29/06; G06F13/38; H04L12/40
Domestic Patent References:
| JP2010258990A |
Foreign References:
| US20100158045 |
Attorney, Agent or Firm:
Miaki Kametani
Tetsuo Kanamoto
Koji Hagiwara
Kazuki Matsumoto
Tetsuo Kanamoto
Koji Hagiwara
Kazuki Matsumoto