Title:
積層型半導体装置、半導体基板及び積層型半導体装置の製造方法。
Document Type and Number:
Japanese Patent JP5157427
Kind Code:
B2
Abstract:
To provide a stacked semiconductor device which prevents chipping from occurring easily in a manufacturing process.
In the stacked semiconductor device, semiconductor substrates 8 each having a circuit region 9 in which bumps 7 are formed at a predetermined distribution density are stacked by bonding the bumps 7 thus forming a stacked semiconductor element, wherein dummy bumps 11 are formed on the periphery 10 of a semiconductor substrate 1 at a distribution density higher than that of the bumps 7 in the circuit region 9 in tight contact with the semiconductor substrate 1, and the dummy bumps 11 of the semiconductor substrates 1 are bonded to each other.
COPYRIGHT: (C)2009,JPO&INPIT
Inventors:
Kazuya Okamoto
Shingo Matsuoka
Shingo Matsuoka
Application Number:
JP2007336212A
Publication Date:
March 06, 2013
Filing Date:
December 27, 2007
Export Citation:
Assignee:
NIKON CORPORATION
International Classes:
H01L25/065; H01L21/60; H01L25/07; H01L25/18
Domestic Patent References:
| JP2002076247A |
Foreign References:
| WO2006011477A1 |
Attorney, Agent or Firm:
Patent business corporation ofh patent office