Planer type heterogeneous device and its manufacturing method

Title:

Planer type heterogeneous device and its manufacturing method

Document Type and Number:

Japanese Patent JP6347081

Kind Code:

B2

Abstract:

In an embodiment a second semiconductor layer is transferred (e.g., using layer transfer techniques) on top of a first semiconductor layer. The second layer is patterned into desired wells. Between the wells, the first layer is exposed. The exposed first layer is epitaxially grown to the level of the transferred second layer to complete a planar heterogeneous substrate including both S1 and S2. The heterogeneous materials may be utilized such that, for example, a P channel device formed from one of III-V or IV materials is coplanar with an N channel device formed from one of III-V or IV materials. The embodiment requires no lattice parameter compliance due to the second layer being transferred onto the first layer. Also, there is no (or little) buffer and/or hetero-epitaxy. Other embodiments are described herein.

Inventors:

Jun, Kimin
Morrow, Patrick

Application Number:

JP2016526310A

Publication Date:

June 27, 2018

Filing Date:

December 18, 2013

Export Citation:

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