Title:
パワー半導体装置
Document Type and Number:
Japanese Patent JP7290420
Kind Code:
B2
Abstract:
An object of the present invention is to reduce a wiring inductance of a power semiconductor device including a smoothing capacitor and achieve miniaturization. A power semiconductor device according to the present invention includes a power semiconductor circuit section, a plurality of smoothing capacitors, a positive electrode conductor portion, a negative electrode conductor portion, and a sealing material. The plurality of smoothing capacitors form a capacitor circuit section sandwiched between the positive electrode conductor portion and the negative electrode conductor portion. The power semiconductor circuit section has a first exposure surface exposed from the sealing material and a second exposure surface that is exposed from the sealing material and provided on a side opposite to the first exposure surface. A plane with which the first exposure surface overlaps is defined as a first plane, and a plane with which the second exposure surface overlaps is defined as a second plane. The capacitor circuit section is formed so as to fit in a space between the first plane and the second plane. The positive electrode conductor portion or the negative electrode conductor portion forms a concave portion to accommodate a part of each of the plurality of smoothing capacitors.
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Inventors:
Masahito Mochizuki
Eiichi Ide
Hitonori Nagasaki
Shintaro Tanaka
Takashi Hirao
Junpei Kusukawa
Enjou Tsuyuno
Eiichi Ide
Hitonori Nagasaki
Shintaro Tanaka
Takashi Hirao
Junpei Kusukawa
Enjou Tsuyuno
Application Number:
JP2019008189A
Publication Date:
June 13, 2023
Filing Date:
January 22, 2019
Export Citation:
Assignee:
株式会社日立製作所
International Classes:
H02M7/48
Domestic Patent References:
JP2010205960A | ||||
JP2013162019A | ||||
JP2018082203A | ||||
JP2006032775A | ||||
JP3841007B2 | ||||
JP2006040926A | ||||
JP2007215396A | ||||
JP2016195179A |
Attorney, Agent or Firm:
Polaire Patent Attorneys Corporation
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