Title:
A semiconductor package, a semiconductor device, and a manufacturing method of a semiconductor package
Document Type and Number:
Japanese Patent JP5981232
Kind Code:
B2
Abstract:
A semiconductor device includes a semiconductor chip, a core substrate, first and second insulating layers, and first and second wiring layers. Adhesiveness of the insulating layer to a metal is higher than adhesiveness of the core substrate to the metal. A through hole extends through the insulating layer in the thickness direction. A through via covers the hole wall surface of the through hole, extends in the thickness direction traversing the insulating layer, and electrically connects the first and second wiring layers.
Inventors:
Noriyoshi Shimizu
Akio Rokukawa
Akihiko Tateiwa
Masato Tanaka
Akio Rokukawa
Akihiko Tateiwa
Masato Tanaka
Application Number:
JP2012129135A
Publication Date:
August 31, 2016
Filing Date:
June 06, 2012
Export Citation:
Assignee:
Shinko Electric Industry Co., Ltd.
International Classes:
H01L23/12; H01L25/065; H01L25/07; H01L25/18; H05K3/46
Domestic Patent References:
| JP6268380A | ||||
| JP2007059821A | ||||
| JP2012216601A | ||||
| JP2011124077A | ||||
| JP2002353631A |
Foreign References:
| US20100133682 | ||||
| US20140175663 |
Attorney, Agent or Firm:
Hironobu Onda
Makoto Onda
Makoto Onda